Notwithstanding the high memory densities of modern VLSI random access memory (RAM) chips, most of the chip area is still consumed by wires, transistors, off-chip drivers and other essential devices and circuitry. The essential memory elements, occupy only a small percentage of the available silicon wafer area. As industry's ability to construct smaller line widths and semiconductor features has improved, memory densities of such chips have improved, however, limits are now being reached that render it increasingly difficult to achieve substantially higher levels of integration.
The most widely used mass memory device is the disk file that can access between ten to one hundred or more megabytes per read/write element. While the capacity of present disk drives is large and the cost per byte of storage is much less than RAM, recording densities remain relatively low. This is due to the difficulties of implementing cost-effective read/write mechanisms that reliably operate at the high speeds of relative motion that occur in the latest disk drive structures. Thus, disk drive random access times are nowhere near RAM access times.
In general, the smaller the number of bits addressed by each read/write element of a disk drive, the smaller is the time for randomly accessing a bit or word. The maximum time to access, randomly, bits on a given track of a disk memory can also be further reduced by disposing additional read/write elements along different radii or over a single track. This adds both additional mechanical complication and cost to the disk system.
In VLSI RAM, the read/write elements are numerous and so are wires. On a RAM chip, while the wires are maintained as short as possible to increase the data transfer rate, the wires still consume the greater portion of the area of the chip.
The challenge for disk manufacturers has been to remain cost competitive with VLSI RAM, while attempting to reduce, if possible, the great disparity in their random transfer rates of data. Thus, while RAMs exhibit transfer rates in the fifty to two hundred nanosecond range, disk drive access times are still in the low millisecond range.
The prior art has attempted to bridge the VLSI RAM/disk drive access time disparity by providing reciprocal oscillatory motion between magnetic read/write heads and a magnetic surface. In U.S. Pat. No. 4,636,893 to McClure, a planar array of magnetic heads is mounted on a piezoelectric structural member. The heads are in contact with a magnetic medium coated onto a stationary support. A repetitive ramp voltage is applied to the piezoelectric structural member, causing repetitive linear extensions of the member with respect to the magnetic medium. This action enables magnetic recording to be implemented by proper energization of the magnetic heads.
The McClure structure suffers from a number of deficiencies. First, it is complex and requires a multiplicity of assembled head structures. McClure's recording density is dependent upon the size of his recording heads and, thus is limited in the number of bit patterns which can be placed on the magnetic medium. Furthermore, the number of magnetic heads which can be included in McClure's head structure will be limited by the relatively high power dissipation experienced in magnetic write actions.
Accordingly, it is an object of this invention to provide an improved mass storage device that enables extremely high density recording of digital data.
It is another object of this invention to provide a mass storage device that employs oscillatory relative motion between a read/write head array and a record surface.
It is yet another object of this invention to provide an improved mass storage device that utilizes an integrated read/write array structure.